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#ifndef _ACPI_H_
00026
#define _ACPI_H_
00027
00028
00029 #define SLEEP_STATE_FLUSH_CACHE 0x1
00030 #define SLEEP_STATE_FIRMWARE_RESTART 0x2
00031 #define SLEEP_STATE_SAVE_MOTHERBOARD 0x4
00032 #define SLEEP_STATE_OFF 0x8
00033 #define SLEEP_STATE_RESTART_OTHER_PROCESSORS 0x10
00034
00035 typedef struct {
00036
union {
00037
struct {
00038 ULONG Pm1aVal:4;
00039 ULONG Pm1bVal:4;
00040 ULONG Flags:24;
00041 } bits;
00042 ULONG AsULONG;
00043 };
00044 }
SLEEP_STATE_CONTEXT, *
PSLEEP_STATE_CONTEXT;
00045
00046
00047
00048
00049
00050
00051 #define P_LVL2 4
00052 #define PBLK_THT_EN 0x10
00053
00054
00055
00056
00057
00058
00059 #define PM1_PWRBTN_STS_BIT 8
00060 #define PM1_PWRBTN_STS (1 << PM1_PWRBTN_STS_BIT)
00061
00062
00063
00064
00065
00066 #define SCI_EN 1
00067 #define BM_RLD 2
00068 #define CTL_IGNORE 0x200
00069 #define SLP_TYP_SHIFT 10
00070 #define SLP_EN 0x2000
00071
00072 #define CTL_PRESERVE (SCI_EN + BM_RLD + CTL_IGNORE)
00073
00074
00075
00076
00077
00078
00079 typedef enum {
00080
HalAcpiTimerInit,
00081
HalAcpiTimerInterrupt,
00082
HalAcpiMachineStateInit,
00083
HalAcpiQueryFlags,
00084
HalPicStateIntact,
00085
HalRestorePicState,
00086
HalPciInterfaceReadConfig,
00087
HalPciInterfaceWriteConfig,
00088
HalSetVectorState,
00089
HalGetIOApicVersion,
00090
HalSetMaxLegacyPciBusNumber,
00091
HalAcpiMaxFunction
00092 }
HAL_DISPATCH_FUNCTION;
00093
00094
typedef
00095
VOID
00096 (*pHalAcpiTimerInit)(
00097 IN ULONG TimerPort,
00098 IN BOOLEAN TimerValExt
00099 );
00100
00101
typedef
00102
VOID
00103 (*pHalAcpiTimerInterrupt)(
00104
VOID
00105 );
00106
00107 typedef struct {
00108 ULONG
Count;
00109 ULONG Pblk[1];
00110 }
PROCESSOR_INIT, *
PPROCESSOR_INIT;
00111
00112 #define HAL_C1_SUPPORTED 0x01
00113 #define HAL_C2_SUPPORTED 0x02
00114 #define HAL_C3_SUPPORTED 0x04
00115 #define HAL_S1_SUPPORTED 0x08
00116 #define HAL_S2_SUPPORTED 0x10
00117 #define HAL_S3_SUPPORTED 0x20
00118 #define HAL_S4_SUPPORTED 0x40
00119 #define HAL_S5_SUPPORTED 0x80
00120
00121 typedef struct {
00122 BOOLEAN Supported;
00123 UCHAR Pm1aVal;
00124 UCHAR Pm1bVal;
00125 }
HAL_SLEEP_VAL, *
PHAL_SLEEP_VAL;
00126
00127
typedef
00128
VOID
00129 (*pHalAcpiMachineStateInit)(
00130 IN
PPROCESSOR_INIT ProcInit,
00131 IN
PHAL_SLEEP_VAL SleepValues,
00132 OUT PULONG PicVal
00133 );
00134
00135
typedef
00136 ULONG
00137 (*pHalAcpiQueryFlags)(
00138
VOID
00139 );
00140
00141
typedef
00142 BOOLEAN
00143 (*pHalPicStateIntact)(
00144
VOID
00145 );
00146
00147
typedef
00148
VOID
00149 (*pHalRestorePicState)(
00150
VOID
00151 );
00152
00153
typedef
00154 ULONG
00155 (*pHalInterfaceReadWriteConfig)(
00156 IN PVOID Context,
00157 IN UCHAR BusOffset,
00158 IN ULONG Slot,
00159 IN PVOID
Buffer,
00160 IN ULONG
Offset,
00161 IN ULONG Length
00162 );
00163
00164
00165
00166
00167
00168 #define VECTOR_MODE 1
00169 #define VECTOR_LEVEL 1
00170 #define VECTOR_EDGE 0
00171 #define VECTOR_POLARITY 2
00172 #define VECTOR_ACTIVE_LOW 2
00173 #define VECTOR_ACTIVE_HIGH 0
00174
00175
00176
00177
00178
00179
00180
00181
00182
00183
00184 #define VECTOR_TYPE 4
00185 #define VECTOR_SIGNAL 0
00186 #define VECTOR_MESSAGE 4
00187
00188 #define IS_LEVEL_TRIGGERED(vectorFlags) \
00189
(vectorFlags & VECTOR_LEVEL)
00190
00191 #define IS_EDGE_TRIGGERED(vectorFlags) \
00192
!(vectorFlags & VECTOR_LEVEL)
00193
00194 #define IS_ACTIVE_LOW(vectorFlags) \
00195
(vectorFlags & VECTOR_ACTIVE_LOW)
00196
00197 #define IS_ACTIVE_HIGH(vectorFlags) \
00198
!(vectorFlags & VECTOR_ACTIVE_LOW)
00199
00200
typedef
00201
VOID
00202 (*pHalSetVectorState)(
00203 IN ULONG Vector,
00204 IN ULONG Flags
00205 );
00206
00207
VOID
00208
HaliSetVectorState(
00209 IN ULONG Vector,
00210 IN ULONG Flags
00211 );
00212
00213 #define HAL_ACPI_PCI_RESOURCES 0x01
00214 #define HAL_ACPI_PRT_SUPPORT 0x02
00215
00216
typedef
00217 ULONG
00218 (*pHalGetIOApicVersion)(
00219 IN ULONG ApicNo
00220 );
00221
00222
typedef
00223
VOID
00224 (*pHalSetMaxLegacyPciBusNumber)(
00225 IN ULONG
BusNumber
00226 );
00227
00228
00229
00230
00231
00232
00233
00234
00235
00236 typedef struct {
00237 ULONG Signature;
00238 ULONG
Version;
00239 pHalAcpiTimerInit HalpAcpiTimerInit;
00240 pHalAcpiTimerInterrupt HalpAcpiTimerInterrupt;
00241 pHalAcpiMachineStateInit HalpAcpiMachineStateInit;
00242 pHalAcpiQueryFlags HalpAcpiQueryFlags;
00243 pHalPicStateIntact HalxPicStateIntact;
00244 pHalRestorePicState HalxRestorePicState;
00245 pHalInterfaceReadWriteConfig HalpPciInterfaceReadConfig;
00246 pHalInterfaceReadWriteConfig HalpPciInterfaceWriteConfig;
00247 pHalSetVectorState HalpSetVectorState;
00248 pHalGetIOApicVersion HalpGetIOApicVersion;
00249 pHalSetMaxLegacyPciBusNumber HalpSetMaxLegacyPciBusNumber;
00250 }
HAL_ACPI_DISPATCH_TABLE, *
PHAL_ACPI_DISPATCH_TABLE;
00251
00252 #define HAL_ACPI_DISPATCH_SIGNATURE 'HAL '
00253 #define HAL_ACPI_DISPATCH_VERSION 1
00254
00255 #define HalAcpiTimerInit ((pHalAcpiTimerInit)PmHalDispatchTable->Function[HalAcpiTimerInit])
00256 #define HalAcpiTimerInterrupt ((pHalAcpiTimerInterrupt)PmHalDispatchTable->Function[HalAcpiTimerInterrupt])
00257 #define HalAcpiMachineStateInit ((pHalAcpiMachineStateInit)PmHalDispatchTable->Function[HalAcpiMachineStateInit])
00258 #define HalPicStateIntact ((pHalPicStateIntact)PmHalDispatchTable->Function[HalPicStateIntact])
00259 #define HalRestorePicState ((pHalRestorePicState)PmHalDispatchTable->Function[HalRestorePicState])
00260 #define HalPciInterfaceReadConfig ((pHalInterfaceReadWriteConfig)PmHalDispatchTable->Function[HalPciInterfaceReadConfig])
00261 #define HalPciInterfaceWriteConfig ((pHalInterfaceReadWriteConfig)PmHalDispatchTable->Function[HalPciInterfaceWriteConfig])
00262 #define HalSetVectorState ((pHalSetVectorState)PmHalDispatchTable->Function[HalSetVectorState])
00263 #define HalGetIOApicVersion ((pHalGetIOApicVersion)PmHalDispatchTable->Function[HalGetIOApicVersion])
00264 #define HalSetMaxLegacyPciBusNumber ((pHalSetMaxLegacyPciBusNumber)PmHalDispatchTable->Function[HalSetMaxLegacyPciBusNumber])
00265
00266 extern PPM_DISPATCH_TABLE PmAcpiDispatchTable;
00267 extern PPM_DISPATCH_TABLE PmHalDispatchTable;
00268
00269
00270
00271
00272 typedef enum {
00273
AcpiEnableDisableGPEvents,
00274
AcpiInitEnableAcpi,
00275
AcpiGpeEnableWakeEvents,
00276
AcpiMaxFunction
00277 }
ACPI_DISPATCH_FUNCTION;
00278
00279
typedef
00280
VOID
00281 (*pAcpiEnableDisableGPEvents) (
00282 IN BOOLEAN Enable
00283 );
00284
00285
typedef
00286
VOID
00287 (*pAcpiInitEnableAcpi) (
00288 IN BOOLEAN ReEnable
00289 );
00290
00291
typedef
00292
VOID
00293 (*pAcpiGpeEnableWakeEvents)(
00294
VOID
00295 );
00296
00297 typedef struct {
00298 ULONG Signature;
00299 ULONG
Version;
00300 pAcpiEnableDisableGPEvents AcpipEnableDisableGPEvents;
00301 pAcpiInitEnableAcpi AcpipInitEnableAcpi;
00302 pAcpiGpeEnableWakeEvents AcpipGpeEnableWakeEvents;
00303 }
ACPI_HAL_DISPATCH_TABLE, *
PACPI_HAL_DISPATCH_TABLE;
00304
00305 #define ACPI_HAL_DISPATCH_SIGNATURE 'ACPI'
00306 #define ACPI_HAL_DISPATCH_VERSION 1
00307
00308 #define AcpiEnableDisableGPEvents (*(pAcpiEnableDisableGPEvents)PmAcpiDispatchTable->Function[AcpiEnableDisableGPEvents])
00309 #define AcpiInitEnableAcpi (*(pAcpiInitEnableAcpi)PmAcpiDispatchTable->Function[AcpiInitEnableAcpi])
00310 #define AcpiGpeEnableWakeEvents (*(pAcpiGpeEnableWakeEvents)PmAcpiDispatchTable->Function[AcpiGpeEnableWakeEvents])
00311
00312
00313 typedef struct {
00314 PHYSICAL_ADDRESS Base;
00315 LARGE_INTEGER Length;
00316 ULONGLONG Type;
00317 }
ACPI_E820_ENTRY, *
PACPI_E820_ENTRY;
00318
00319 typedef struct _ACPI_BIOS_MULTI_NODE {
00320 PHYSICAL_ADDRESS
RsdtAddress;
00321 ULONGLONG
Count;
00322 ACPI_E820_ENTRY E820Entry[1];
00323 }
ACPI_BIOS_MULTI_NODE, *
PACPI_BIOS_MULTI_NODE;
00324
00325 typedef enum {
00326
AcpiAddressRangeMemory = 1,
00327
AcpiAddressRangeReserved,
00328
AcpiAddressRangeACPI,
00329
AcpiAddressRangeNVS,
00330
AcpiAddressRangeMaximum,
00331 }
ACPI_BIOS_E820_TYPE, *
PACPI_BIOS_E820_TYPE;
00332
00333
00334
NTSTATUS
00335
HalpAcpiFindRsdt (
00336 OUT PACPI_BIOS_MULTI_NODE *AcpiMulti
00337 );
00338
00339
#endif //_ACPI_H_
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