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jnsndef.h

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00001 /*++ BUILD Version: 0001 // Increment this if a change has global effects 00002 00003 Copyright (c) 1990 Microsoft Corporation 00004 Copyright (c) 1992 Digital Equipment Corporation 00005 00006 Module Name: 00007 00008 jnsndef.h 00009 00010 Abstract: 00011 00012 This module is the header file that describes hardware addresses 00013 for the Jensen systems. 00014 00015 Author: 00016 00017 David N. Cutler (davec) 26-Nov-1990 00018 Miche Baker-Harvey (miche) 13-May 1992 00019 00020 Revision History: 00021 00022 2-Oct-1992 Rod Gamache [DEC] 00023 Add DEVICE_LEVEL. 00024 00025 22-Jul-1992 Jeff McLeman (mcleman) 00026 Add three define QVA's for DMA control, 00027 Video memory and video control. These are the 00028 same addresses the FW wil use, so they can reside 00029 here. Add INT_CONTROL and VA for INTA. 00030 00031 12-Jul-1992 Jeff McLeman (mcleman) 00032 Move PTRANSLATION_ENTRY to jnsndma.h 00033 00034 07-Jul-1992 Jeff McLeman (mcleman) 00035 Add PTRANSLATION_ENTRY structure 00036 00037 --*/ 00038 00039 #ifndef _JNSNDEF_ 00040 #define _JNSNDEF_ 00041 00042 // 00043 // Include the reference definitions. 00044 // 00045 00046 #include "alpharef.h" 00047 00048 // 00049 // Nothing actually changed here - MBH; device stuff changed below 00050 // 00051 00052 // 00053 // Define physical base addresses for system mapping. 00054 // 00055 00056 #define LOCAL_MEMORY_PHYSICAL_BASE ((ULONGLONG)0x000000000) 00057 #define EISA_INTA_CYCLE_PHYSICAL_BASE ((ULONGLONG)0x100000000) 00058 #define FEPROM_0_PHYSICAL_BASE ((ULONGLONG)0x180000000) 00059 #define FEPROM_1_PHYSICAL_BASE ((ULONGLONG)0x1A0000000) 00060 #define COMBO_CHIP_PHYSICAL_BASE ((ULONGLONG)0x1C0000000) 00061 #define HAE_PHYSICAL_BASE ((ULONGLONG)0x1D0000000) 00062 #define SYSTEM_CTRL_REG_PHYSICAL_BASE ((ULONGLONG)0x1E0000000) 00063 #define SPARE_REGISTER_PHYSICAL_BASE ((ULONGLONG)0x1F0000000) 00064 #define EISA_MEMORY_PHYSICAL_BASE ((ULONGLONG)0x200000000) 00065 #define EISA_IO_PHYSICAL_BASE ((ULONGLONG)0x300000000) 00066 00067 // 00068 // Define interesting device addresses 00069 // 00070 00071 #define SP_PHYSICAL_BASE ((ULONGLONG)0x1c007f000) // physical base of serial port 0 00072 00073 #define DMA_PHYSICAL_BASE EISA_IO_PHYSICAL_BASE // physical base of DMA control 00074 00075 #define RTCLOCK_PHYSICAL_BASE ((ULONGLONG)0x1c002e000) 00076 00077 // 00078 // define VECTORS for Jensen 00079 // 00080 00081 #define KEYBOARD_MOUSE_VECTOR 11 00082 00083 // 00084 // define QVA's that are needed 00085 // 00086 00087 #define DMA_VIRTUAL_BASE 0xB8000000 // virtual base of DMA control 00088 00089 #define VIDEO_CONTROL_VIRTUAL_BASE 0xB80003C0 // virtual base, video control 00090 00091 #define VIDEO_MEMORY_VIRTUAL_BASE 0xB00B8000 // virtual base of video memory 00092 00093 #define EISA_INTA_CYCLE_VIRTUAL_BASE 0xA0000000 // VA of intack 00094 00095 #define HAE_VIRTUAL_BASE 0xA0E80000 // VA of HAE register 00096 00097 // 00098 // Define the size of the DMA translation table. 00099 // 00100 #define DMA_TRANSLATION_LIMIT 0x1000 // translation table limit 00101 00102 // 00103 // Define pointer to DMA control registers. 00104 // 00105 00106 #define DMA_CONTROL ((volatile PEISA_CONTROL)(DMA_VIRTUAL_BASE)) 00107 00108 00109 // Define a pointer to the Eisa INTA register 00110 // 00111 00112 #define INT_CONTROL (volatile PINTACK_REGISTERS)EISA_INTA_CYCLE_VIRTUAL_BASE 00113 00114 // 00115 // Define system time increment value. 00116 // 00117 00118 #define TIME_INCREMENT (10 * 1000 * 10) // Time increment in 100ns units 00119 00120 // 00121 // EISA I/O access values 00122 // 00123 00124 #define EISA_BIT_SHIFT 0x07 // Bits to shift address 00125 #define EISA_BYTE_OFFSET 0x080 // Offset to next byte 00126 #define EISA_SHORT_OFFSET 0x100 // Offset to next short 00127 #define EISA_LONG_OFFSET 0x200 // Offset to next longword 00128 00129 #define EISA_BYTE_LEN 0x00 // Byte length 00130 #define EISA_WORD_LEN 0x20 // Word length 00131 #define EISA_TRIBYTE_LEN 0x40 // TriByte length 00132 #define EISA_LONG_LEN 0x60 // LONGWORD length 00133 00134 #define EISA_FIRST 0x000 // Byte, word and longword offsets 00135 #define EISA_SECOND 0x080 // for EISA access. To get the 00136 #define EISA_THIRD 0x100 // 2nd word, use (WORD_LEN|SECOND) 00137 #define EISA_FOURTH 0x180 00138 00139 00140 // 00141 // Combo chip I/O access values -the 82C106 is only byte addressable 00142 // 00143 00144 #define COMBO_BIT_SHIFT 0x009 // Bits to shift address 00145 #define COMBO_BYTE_LEN 0x000 // Byte length 00146 #define COMBO_BYTE_OFFSET 0x200 // offset to next longword 00147 00148 00149 // 00150 // The bits which are set if this is a "QVA" - quasi virtual address, 00151 // for getting to I/O space. Returned by wrapper for MmMapIoSpace, 00152 // used by I/O access routines. 00153 // 00154 00155 #define BUS_QVA (QVA_ENABLE | 0x10000000) 00156 00157 #define EISA_QVA (QVA_ENABLE | 0x10000000) 00158 #define COMBO_QVA (QVA_ENABLE | 0x00000000) 00159 00160 #define IS_EISA_QVA(x) (((ULONG)x & BUS_QVA) == EISA_QVA) 00161 #define IS_COMBO_QVA(x) (((ULONG)x & BUS_QVA) == COMBO_QVA) 00162 00163 00164 00165 #endif // _JNSNDEF_ 00166

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