00251 :
00252
00253 This function
is called to
try to determine
the precise location of
the
00254 instruction that caused an arithmetic exception. The instruction that
00255 caused
the trap to occur
is known as
the trigger instruction. On entry,
00256
the actual address of
the trigger instruction
is unknown and
the exception
00257 address
is the continuation address. The continuation address
is the
00258 address of
the instruction that would have executed had
the trap not
00259 occurred. The instructions following
the trigger instruction up to
the
00260 continuation address are known as
the trap shadow of
the trigger
00261 instruction.
00262
00263 Alpha AXP produces imprecise, asynchronous arithmetic exceptions. The
00264 exceptions are imprecise because
the exception address when a trap
is
00265 taken may be more than one instruction beyond
the address of
the
00266 instruction that actually caused
the trap to occur.
00267
00268 The arithmetic exceptions are traps (rather than faults) because
the
00269 exception address
is not
the address of
the trapping instruction
00270 itself, but
the address of
the next instruction to execute, which
is
00271 always (at least) one instruction beyond
the address of
the trapping
00272 instruction.
00273
00274 It
is possible
for multiple exceptions to occur and result in a single
00275 trap. This function
only determines
the address of
the first trapping
00276 instruction.
00277
00278 Unpredictable values may have been stored in
the destination
register
00279 of trapping instructions. Thus to insure that
the trigger instruction
00280 can be located, and that
the trigger instruction and any instructions
00281 in
the trap shadow can be re-executed, certain restrictions are placed
00282 on
the type of instructions or
the mix of operands in
the trap shadow.
00283
00284 The code generation rules serve
only to guarantee that
the instruction
00285 backup algorithm and subsequent re-execution can always be successful.
00286 Hence
the restrictions on such constructs as branches, jumps, and
the
00287 re-use of source or destination operands within
the trap shadow.
00288
00289 Arguments:
00290
00291 ExceptionRecord - Supplies a pointer to an exception record.
00292
00293 TrapFrame - Supplies a pointer to a trap frame.
00294
00295 Return Value:
00296
00297 If
the trigger PC was precisely determined,
the exception address in
00298
the exception record
is set to
the trigger PC,
the continuation address
00299 in
the trap frame
is updated, and a value of
TRUE is returned. Otherwise
00300 no values are stored and a value of
FALSE is returned.
00301
00302 --*/
00303
00304 {
00305
00306 PEXC_SUM ExceptionSummary;
00307 ULONG Fa;
00308 ULONG Fb;
00309 ULONG Fc;
00310 ULONG FloatRegisterTrashMask;
00311 ULONG FloatRegisterWriteMask;
00312 ALPHA_INSTRUCTION Instruction;
00313 ULONG IntegerRegisterWriteMask;
00314 ULONG Opcode;
00315 ULONG_PTR TrapShadowLowLimit;
00316 ULONG_PTR TriggerPc;
00317
KPROCESSOR_MODE PreviousMode;
00318
00319
00320
00321
00322
00323
00324
00325 FloatRegisterWriteMask = (ULONG)ExceptionRecord->ExceptionInformation[0];
00326 IntegerRegisterWriteMask = (ULONG)ExceptionRecord->ExceptionInformation[1];
00327 ExceptionSummary = (PEXC_SUM)&(ExceptionRecord->ExceptionInformation[2]);
00328
DBGPRINT(
"KiLocateTriggerPc: WriteMask %.8lx.%.8lx, ExceptionSummary %.8lx\n",
00329 FloatRegisterWriteMask, IntegerRegisterWriteMask,
00330 *(PULONG)ExceptionSummary);
00331
00332
00333
00334
00335
00336 PreviousMode = (
KPROCESSOR_MODE)(((
PSR *)(&TrapFrame->Psr))->MODE);
00337
00338
if (FloatRegisterWriteMask == 0) {
00339
00340
00341
00342
00343
00344
00345
00346
DBGPRINT(
"KiLocateTriggerPc: FloatRegisterWriteMask clear\n");
00347
NON_IEEE(ExceptionRecord, TRIGGER_FLOATING_REGISTER_MASK_CLEAR);
00348
return FALSE;
00349 }
00350
if (IntegerRegisterWriteMask != 0) {
00351
00352
00353
00354
00355
00356
00357
DBGPRINT(
"KiLocateTriggerPc: IntegerRegisterMask set.\n");
00358
NON_IEEE(ExceptionRecord, TRIGGER_INTEGER_REGISTER_MASK_SET);
00359
return FALSE;
00360 }
00361
if (ExceptionSummary->SoftwareCompletion == 0) {
00362
00363
00364
00365
00366
00367
00368
00369
00370
00371
00372
DBGPRINT(
"KiLocateTriggerPc: SoftwareCompletion clear\n");
00373
NON_IEEE(ExceptionRecord, TRIGGER_NO_SOFTWARE_COMPLETION);
00374
return FALSE;
00375 }
00376
00377
00378
00379
00380
00381
00382
00383
00384
00385
00386 FloatRegisterTrashMask = 0;
00387 TriggerPc = (ULONG_PTR)TrapFrame->Fir;
00388 TrapShadowLowLimit = TriggerPc - (500 *
sizeof(ULONG));
00389
00390
try {
00391
do {
00392 TriggerPc -= 4;
00393
if (TriggerPc < TrapShadowLowLimit) {
00394
00395
00396
00397
00398
00399
00400
DBGPRINT(
"KiLocateTriggerPc: Trap shadow too long\n");
00401
NON_IEEE(ExceptionRecord, TRIGGER_INSTRUCTION_NOT_FOUND);
00402
return FALSE;
00403 }
00404
00405
if (PreviousMode !=
KernelMode) {
00406 Instruction.Long =
ProbeAndReadUlong((PULONG)TriggerPc);
00407 }
else {
00408 Instruction.Long = *((PULONG)TriggerPc);
00409 }
00410
00411
00412
00413
00414
00415
00416 Opcode = Instruction.Memory.Opcode;
00417
if (Opcode == JMP_OP) {
00418
00419
00420
00421
00422
00423
00424
DBGPRINT(
"KiLocateTriggerPc: Jump within Trap Shadow\n");
00425
NON_IEEE(ExceptionRecord, TRIGGER_INVALID_INSTRUCTION_FOUND);
00426
return FALSE;
00427
00428 }
else if ((Opcode >= BR_OP) && (Opcode <= BGT_OP)) {
00429
00430
00431
00432
00433
00434
00435
00436
DBGPRINT(
"KiLocateTriggerPc: Branch within Trap Shadow\n");
00437
NON_IEEE(ExceptionRecord, TRIGGER_INVALID_INSTRUCTION_FOUND);
00438
return FALSE;
00439
00440 }
else if ((Instruction.Memory.Opcode == MEMSPC_OP) &&
00441 ((Instruction.Memory.MemDisp == TRAPB_FUNC) ||
00442 (Instruction.Memory.MemDisp == EXCB_FUNC))) {
00443
00444
00445
00446
00447
00448
00449
DBGPRINT(
"KiLocateTriggerPc: Trapb within Trap Shadow\n");
00450
NON_IEEE(ExceptionRecord, TRIGGER_INVALID_INSTRUCTION_FOUND);
00451
return FALSE;
00452
00453 }
else if (Opcode == CALLPAL_OP) {
00454
00455
00456
00457
00458
00459
DBGPRINT(
"KiLocateTriggerPc: Call PAL within Trap Shadow\n");
00460
NON_IEEE(ExceptionRecord, TRIGGER_INVALID_INSTRUCTION_FOUND);
00461
return FALSE;
00462
00463 }
else if ((Opcode == IEEEFP_OP) || (Opcode == FPOP_OP)) {
00464
00465
00466
00467
00468
00469
00470
00471 Fc = Instruction.FpOp.Fc;
00472
if (Fc != FZERO_REG) {
00473 FloatRegisterTrashMask |= (1 << Fc);
00474 }
00475 FloatRegisterWriteMask &= ~(1 << Fc);
00476 }
00477
00478 }
while (FloatRegisterWriteMask != 0);
00479
00480
00481
00482
00483
00484
00485
00486
if ((Instruction.FpOp.Function & FP_TRAP_ENABLE_S) == 0) {
00487
DBGPRINT(
"KiLocateTriggerPc: Trigger instruction missing /S\n");
00488
NON_IEEE(ExceptionRecord, TRIGGER_WRONG_INSTRUCTION);
00489
return FALSE;
00490 }
00491
00492
00493
00494
00495
00496
00497
00498
00499
00500
00501 Fa = Instruction.FpOp.Fa;
00502 Fb = Instruction.FpOp.Fb;
00503
if ((FloatRegisterTrashMask & ((1 << Fa) | (1 << Fb))) != 0) {
00504
DBGPRINT(
"KiLocateTriggerPc: Source is destination\n");
00505
NON_IEEE(ExceptionRecord, TRIGGER_SOURCE_IS_DESTINATION);
00506
return FALSE;
00507 }
00508
00509 } except (EXCEPTION_EXECUTE_HANDLER) {
00510
00511
00512
00513
00514
00515
00516
DBGPRINT(
"KiLocateTriggerPc: Instruction fetch error\n");
00517
NON_IEEE(ExceptionRecord, TRIGGER_INSTRUCTION_FETCH_ERROR);
00518
return FALSE;
00519 }
00520
00521
00522
00523
00524
00525
00526
00527
DBGPRINT(
"KiLocateTriggerPc: Exception PC = %p, Trigger PC = %p\n",
00528 ExceptionRecord->ExceptionAddress, TriggerPc);
00529 ExceptionRecord->ExceptionAddress = (PVOID)TriggerPc;
00530 TrapFrame->Fir = (ULONGLONG)(LONG_PTR)(TriggerPc + 4);
00531
return TRUE;
00532 }