test: ke/ia64/context.c File Reference

if (AddressOffset == Start) { \ Result = (ULONGLONG)Source; \ } else if (AddressOffset < Start) { \ Result = (ULONGLONG)(Source << (Start - AddressOffset)); \ } else { \ Result = (ULONGLONG)((Source >> (AddressOffset - Start)) | \ (Source << (64 + Start - AddressOffset))); \ } \ Result = Result & (ULONGLONG)Mask

Result = (ULONGLONG)(Source & (ULONGLONG)Mask); \ if (AddressOffset < Start) { \ Result = Result >> (Start - AddressOffset); \ } else if (AddressOffset > Start) { \ Result = ((Result << (AddressOffset - Start)) | \ (Result >> (64 + Start - AddressOffset))); \ }

00173 : 00174 00175 This routine moves the selected contents of the specified trap and exception 00176 frames into the specified context frame according to the specified context 00177 flags. 00178 00179 Arguments: 00180 00181 TrapFrame - Supplies a pointer to a trap frame from which volatile context 00182 should be copied into the context record. 00183 00184 ExceptionFrame - Supplies a pointer to an exception frame from which context 00185 should be copied into the context record. 00186 00187 ContextFrame - Supplies a pointer to the context frame that receives the 00188 context copied from the trap and exception frames. 00189 00190 Return Value: 00191 00192 None. 00193 00194 --*/ 00195 00196 { 00197 ULONGLONG IntNats1, IntNats2; 00198 USHORT R1Offset, R4Offset; 00199 USHORT RNatSaveIndex; 00200 SHORT BsFrameSize; 00201 SHORT TempFrameSize; 00202 00203 // 00204 // Set control information if specified. 00205 // 00206 00207 if ((ContextFrame->ContextFlags & CONTEXT_CONTROL) == CONTEXT_CONTROL) { 00208 00209 ContextFrame->IntGp = TrapFrame->IntGp; 00210 ContextFrame->IntSp = TrapFrame->IntSp; 00211 ContextFrame->ApUNAT = TrapFrame->ApUNAT; 00212 ContextFrame->BrRp = TrapFrame->BrRp; 00213 ContextFrame->ApCCV = TrapFrame->ApCCV; 00214 ContextFrame->ApDCR = TrapFrame->ApDCR; 00215 00216 ContextFrame->StFPSR = TrapFrame->StFPSR; 00217 ContextFrame->StIPSR = TrapFrame->StIPSR; 00218 ContextFrame->StIIP = TrapFrame->StIIP; 00219 ContextFrame->StIFS = TrapFrame->StIFS; 00220 00221 00222 // 00223 // Set RSE control states from the trap frame. 00224 // 00225 00226 ContextFrame->RsPFS = TrapFrame->RsPFS; 00227 00228 BsFrameSize = (SHORT)(TrapFrame->StIFS & PFS_SIZE_MASK); 00229 RNatSaveIndex = (USHORT) (TrapFrame->RsBSP >> 3) & NAT_BITS_PER_RNAT_REG; 00230 TempFrameSize = BsFrameSize - RNatSaveIndex; 00231 while (TempFrameSize > 0) { 00232 BsFrameSize++; 00233 TempFrameSize -= NAT_BITS_PER_RNAT_REG; 00234 } 00235 00236 ContextFrame->RsBSP = TrapFrame->RsBSP - BsFrameSize * 8; 00237 ContextFrame->RsBSPSTORE = ContextFrame->RsBSP; 00238 ContextFrame->RsRSC = TrapFrame->RsRSC; 00239 ContextFrame->RsRNAT = TrapFrame->RsRNAT; 00240 00241 #if DEBUG 00242 DbgPrint("KeContextFromKFrames: RsRNAT = 0x%I64x\n", 00243 ContextFrame->RsRNAT); 00244 #endif // DEBUG 00245 00246 // 00247 // Set preserved applicaton registers from exception frame. 00248 // 00249 00250 ContextFrame->ApLC = ExceptionFrame->ApLC; 00251 ContextFrame->ApEC = (ExceptionFrame->ApEC >> PFS_EC_SHIFT) & PFS_EC_MASK; 00252 00253 // 00254 // Get iA status from the application registers 00255 // 00256 00257 ContextFrame->StFCR = __getReg(CV_IA64_AR21); 00258 ContextFrame->Eflag = __getReg(CV_IA64_AR24); 00259 ContextFrame->SegCSD = __getReg(CV_IA64_AR25); 00260 ContextFrame->SegSSD = __getReg(CV_IA64_AR26); 00261 ContextFrame->Cflag = __getReg(CV_IA64_AR27); 00262 ContextFrame->StFSR = __getReg(CV_IA64_AR28); 00263 ContextFrame->StFIR = __getReg(CV_IA64_AR29); 00264 ContextFrame->StFDR = __getReg(CV_IA64_AR30); 00265 00266 } 00267 00268 // 00269 // Set integer register contents if specified. 00270 // 00271 00272 if ((ContextFrame->ContextFlags & CONTEXT_INTEGER) == CONTEXT_INTEGER) { 00273 00274 ContextFrame->IntT0 = TrapFrame->IntT0; 00275 ContextFrame->IntT1 = TrapFrame->IntT1; 00276 ContextFrame->IntT2 = TrapFrame->IntT2; 00277 ContextFrame->IntT3 = TrapFrame->IntT3; 00278 ContextFrame->IntT4 = TrapFrame->IntT4; 00279 ContextFrame->IntV0 = TrapFrame->IntV0; 00280 ContextFrame->IntTeb = TrapFrame->IntTeb; 00281 ContextFrame->Preds = TrapFrame->Preds; 00282 00283 // 00284 // t5 - t22 00285 // 00286 00287 memcpy(&ContextFrame->IntT5, &TrapFrame->IntT5, 18*sizeof(ULONGLONG)); 00288 00289 // 00290 // Set branch registers from trap frame & exception frame 00291 // 00292 00293 ContextFrame->BrT0 = TrapFrame->BrT0; 00294 ContextFrame->BrT1 = TrapFrame->BrT1; 00295 00296 memcpy(&ContextFrame->BrS0, &ExceptionFrame->BrS0, 5*sizeof(ULONGLONG)); 00297 00298 // 00299 // Set integer registers s0 - s3 from exception frame. 00300 // 00301 00302 ContextFrame->IntS0 = ExceptionFrame->IntS0; 00303 ContextFrame->IntS1 = ExceptionFrame->IntS1; 00304 ContextFrame->IntS2 = ExceptionFrame->IntS2; 00305 ContextFrame->IntS3 = ExceptionFrame->IntS3; 00306 00307 // 00308 // Set the integer nats field in the context 00309 // 00310 00311 R1Offset = (USHORT)((ULONG_PTR)(&TrapFrame->IntGp) >> 3) & 0x3f; 00312 R4Offset = (USHORT)((ULONG_PTR)(&ExceptionFrame->IntS0) >> 3) & 0x3f; 00313 00314 ALIGN_NATS(IntNats1, TrapFrame->IntNats, 1, R1Offset, 0xFFFFFF0E); 00315 ALIGN_NATS(IntNats2, ExceptionFrame->IntNats, 4, R4Offset, 0xF0); 00316 ContextFrame->IntNats = IntNats1 | IntNats2; 00317 00318 #if DEBUG 00319 DbgPrint("KeContextFromKFrames: TF->IntNats = 0x%I64x, R1OffSet = 0x%x, R4Offset = 0x%x\n", 00320 TrapFrame->IntNats, R1Offset, R4Offset); 00321 DbgPrint("KeContextFromKFrames: CF->IntNats = 0x%I64x, IntNats1 = 0x%I64x, IntNats2 = 0x%I64x\n", 00322 ContextFrame->IntNats, IntNats1, IntNats2); 00323 #endif // DEBUG 00324 00325 } 00326 00327 // 00328 // Set lower floating register contents if specified. 00329 // 00330 00331 if ((ContextFrame->ContextFlags & CONTEXT_LOWER_FLOATING_POINT) == CONTEXT_LOWER_FLOATING_POINT) { 00332 00333 // 00334 // Set EM + ia32 FP status 00335 // 00336 00337 ContextFrame->StFPSR = TrapFrame->StFPSR; 00338 00339 // 00340 // Set floating registers fs0 - fs19 from exception frame. 00341 // 00342 00343 RtlCopyIa64FloatRegisterContext(&ContextFrame->FltS0, 00344 &ExceptionFrame->FltS0, 00345 sizeof(FLOAT128) * (4)); 00346 00347 RtlCopyIa64FloatRegisterContext(&ContextFrame->FltS4, 00348 &ExceptionFrame->FltS4, 00349 16*sizeof(FLOAT128)); 00350 00351 // 00352 // Set floating registers ft0 - ft9 from trap frame. 00353 // 00354 00355 RtlCopyIa64FloatRegisterContext(&ContextFrame->FltT0, 00356 &TrapFrame->FltT0, 00357 sizeof(FLOAT128) * (10)); 00358 00359 } 00360 00361 if ((ContextFrame->ContextFlags & CONTEXT_HIGHER_FLOATING_POINT) == CONTEXT_HIGHER_FLOATING_POINT) { 00362 00363 ContextFrame->StFPSR = TrapFrame->StFPSR; 00364 00365 // 00366 // Set floating regs f32 - f127 from higher floating point save area 00367 // 00368 00369 if (TrapFrame->PreviousMode == UserMode) { 00370 00371 RtlCopyIa64FloatRegisterContext( 00372 &ContextFrame->FltF32, 00373 (PFLOAT128)GET_HIGH_FLOATING_POINT_REGISTER_SAVEAREA(), 00374 96*sizeof(FLOAT128) 00375 ); 00376 } 00377 00378 } 00379 00380 // 00381 // Get user debug registers from save area in kernel stack. 00382 // Note: PSR.db must be set to activate the debug registers. 00383 // 00384 00385 if ((ContextFrame->ContextFlags & CONTEXT_DEBUG) == CONTEXT_DEBUG) { 00386 KiGetDebugContext(TrapFrame, ContextFrame); 00387 } 00388 00389 return; 00390 }

00403 : 00404 00405 This routine moves the selected contents of the specified context frame into 00406 the specified trap and exception frames according to the specified context 00407 flags. 00408 00409 Arguments: 00410 00411 TrapFrame - Supplies a pointer to a trap frame that receives the volatile 00412 context from the context record. 00413 00414 ExceptionFrame - Supplies a pointer to an exception frame that receives 00415 the nonvolatile context from the context record. 00416 00417 ContextFrame - Supplies a pointer to a context frame that contains the 00418 context that is to be copied into the trap and exception frames. 00419 00420 ContextFlags - Supplies the set of flags that specify which parts of the 00421 context frame are to be copied into the trap and exception frames. 00422 00423 PreviousMode - Supplies the processor mode for which the trap and exception 00424 frames are being built. 00425 00426 Return Value: 00427 00428 None. 00429 00430 --*/ 00431 00432 { 00433 USHORT R1Offset, R4Offset; 00434 USHORT RNatSaveIndex; 00435 SHORT BsFrameSize; 00436 SHORT TempFrameSize; 00437 00438 // 00439 // Set control information if specified. 00440 // 00441 00442 if ((ContextFlags & CONTEXT_CONTROL) == CONTEXT_CONTROL) { 00443 00444 TrapFrame->IntGp = ContextFrame->IntGp; 00445 TrapFrame->IntSp = ContextFrame->IntSp; 00446 TrapFrame->ApUNAT = ContextFrame->ApUNAT; 00447 TrapFrame->BrRp = ContextFrame->BrRp; 00448 TrapFrame->ApCCV = ContextFrame->ApCCV; 00449 TrapFrame->ApDCR = SANITIZE_DCR(ContextFrame->ApDCR, PreviousMode); 00450 00451 // 00452 // Set preserved applicaton registers in exception frame. 00453 // 00454 00455 ExceptionFrame->ApLC = ContextFrame->ApLC; 00456 ExceptionFrame->ApEC &= ~(PFS_EC_MASK << PFS_EC_MASK); 00457 ExceptionFrame->ApEC |= ((ContextFrame->ApEC & PFS_EC_MASK) << PFS_EC_SHIFT); 00458 00459 // 00460 // Set RSE control states in the trap frame. 00461 // 00462 00463 TrapFrame->RsPFS = ContextFrame->RsPFS; 00464 00465 BsFrameSize = (SHORT)(ContextFrame->StIFS & PFS_SIZE_MASK); 00466 RNatSaveIndex = (USHORT)((ContextFrame->RsBSP >> 3) & NAT_BITS_PER_RNAT_REG); 00467 00468 TempFrameSize = RNatSaveIndex + BsFrameSize - NAT_BITS_PER_RNAT_REG; 00469 while (TempFrameSize >= 0) { 00470 BsFrameSize++; 00471 TempFrameSize -= NAT_BITS_PER_RNAT_REG; 00472 } 00473 00474 TrapFrame->RsBSPSTORE = ContextFrame->RsBSPSTORE + BsFrameSize * 8; 00475 TrapFrame->RsBSP = TrapFrame->RsBSPSTORE; 00476 TrapFrame->RsRSC = ContextFrame->RsRSC; 00477 TrapFrame->RsRNAT = ContextFrame->RsRNAT; 00478 00479 #if DEBUG 00480 DbgPrint("KeContextToKFrames: RsRNAT = 0x%I64x\n", TrapFrame->RsRNAT); 00481 #endif // DEBUG 00482 00483 // 00484 // Set FPSR, IPSR, IIP, and IFS in the trap frame. 00485 // 00486 00487 TrapFrame->StFPSR = SANITIZE_FSR(ContextFrame->StFPSR, PreviousMode); 00488 TrapFrame->StIPSR = SANITIZE_PSR(ContextFrame->StIPSR, PreviousMode); 00489 if (((TrapFrame->StIPSR >> PSR_RI) & 3) == 3) { 00490 TrapFrame->StIPSR &= ~(3i64 << PSR_RI); 00491 } 00492 TrapFrame->StIFS = SANITIZE_IFS(ContextFrame->StIFS, PreviousMode); 00493 TrapFrame->StIIP = ContextFrame->StIIP; 00494 00495 // 00496 // DebugActive controls h/w debug registers. Set if new psr.db = 1 00497 // 00498 00499 KeGetCurrentThread()->DebugActive = ((TrapFrame->StIPSR & (1I64 << PSR_DB)) != 0); 00500 00501 // 00502 // Set application registers directly 00503 // *** TBD SANATIZE?? 00504 // 00505 00506 if (PreviousMode == UserMode ) { 00507 __setReg(CV_IA64_AR21, ContextFrame->StFCR); 00508 __setReg(CV_IA64_AR24, ContextFrame->Eflag); 00509 __setReg(CV_IA64_AR25, ContextFrame->SegCSD); 00510 __setReg(CV_IA64_AR26, ContextFrame->SegSSD); 00511 __setReg(CV_IA64_AR27, ContextFrame->Cflag); 00512 __setReg(CV_IA64_AR28, ContextFrame->StFSR); 00513 __setReg(CV_IA64_AR29, ContextFrame->StFIR); 00514 __setReg(CV_IA64_AR30, ContextFrame->StFDR); 00515 } 00516 } 00517 00518 // 00519 // Set integer registers contents if specified. 00520 // 00521 00522 if ((ContextFlags & CONTEXT_INTEGER) == CONTEXT_INTEGER) { 00523 00524 TrapFrame->IntT0 = ContextFrame->IntT0; 00525 TrapFrame->IntT1 = ContextFrame->IntT1; 00526 TrapFrame->IntT2 = ContextFrame->IntT2; 00527 TrapFrame->IntT3 = ContextFrame->IntT3; 00528 TrapFrame->IntT4 = ContextFrame->IntT4; 00529 TrapFrame->IntV0 = ContextFrame->IntV0; 00530 TrapFrame->IntTeb = ContextFrame->IntTeb; 00531 TrapFrame->Preds = ContextFrame->Preds; 00532 00533 // 00534 // t5 - t22 00535 // 00536 00537 memcpy(&TrapFrame->IntT5, &ContextFrame->IntT5, 18*sizeof(ULONGLONG)); 00538 00539 // 00540 // Set integer registers s0 - s3 in exception frame. 00541 // 00542 00543 ExceptionFrame->IntS0 = ContextFrame->IntS0; 00544 ExceptionFrame->IntS1 = ContextFrame->IntS1; 00545 ExceptionFrame->IntS2 = ContextFrame->IntS2; 00546 ExceptionFrame->IntS3 = ContextFrame->IntS3; 00547 00548 // 00549 // Set the integer nats field in the trap & exception frames 00550 // 00551 00552 R1Offset = (USHORT)((ULONG_PTR)(&TrapFrame->IntGp) >> 3) & 0x3f; 00553 R4Offset = (USHORT)((ULONG_PTR)(&ExceptionFrame->IntS0) >> 3) & 0x3f; 00554 00555 EXTRACT_NATS(TrapFrame->IntNats, ContextFrame->IntNats, 00556 1, R1Offset, 0xFFFFFF0E); 00557 EXTRACT_NATS(ExceptionFrame->IntNats, ContextFrame->IntNats, 00558 4, R4Offset, 0xF0); 00559 00560 #if DEBUG 00561 DbgPrint("KeContextToKFrames: TF->IntNats = 0x%I64x, ContestFrame->IntNats = 0x%I64x, R1OffSet = 0x%x\n", 00562 TrapFrame->IntNats, ContextFrame->IntNats, R1Offset); 00563 DbgPrint("KeContextToKFrames: EF->IntNats = 0x%I64x, R4OffSet = 0x%x\n", 00564 ExceptionFrame->IntNats, R4Offset); 00565 #endif // DEBUG 00566 00567 // 00568 // Set other branch registers in trap and exception frames 00569 // 00570 00571 TrapFrame->BrT0 = ContextFrame->BrT0; 00572 TrapFrame->BrT1 = ContextFrame->BrT1; 00573 00574 memcpy(&ExceptionFrame->BrS0, &ContextFrame->BrS0, 5*sizeof(ULONGLONG)); 00575 00576 } 00577 00578 // 00579 // Set lower floating register contents if specified. 00580 // 00581 00582 if ((ContextFlags & CONTEXT_LOWER_FLOATING_POINT) == CONTEXT_LOWER_FLOATING_POINT) { 00583 00584 TrapFrame->StFPSR = SANITIZE_FSR(ContextFrame->StFPSR, PreviousMode); 00585 00586 // 00587 // Set floating registers fs0 - fs19 in exception frame. 00588 // 00589 00590 RtlCopyIa64FloatRegisterContext(&ExceptionFrame->FltS0, 00591 &ContextFrame->FltS0, 00592 sizeof(FLOAT128) * (4)); 00593 00594 RtlCopyIa64FloatRegisterContext(&ExceptionFrame->FltS4, 00595 &ContextFrame->FltS4, 00596 16*sizeof(FLOAT128)); 00597 00598 // 00599 // Set floating registers ft0 - ft9 in trap frame. 00600 // 00601 00602 RtlCopyIa64FloatRegisterContext(&TrapFrame->FltT0, 00603 &ContextFrame->FltT0, 00604 sizeof(FLOAT128) * (10)); 00605 00606 } 00607 00608 // 00609 // Set higher floating register contents if specified. 00610 // 00611 00612 if ((ContextFlags & CONTEXT_HIGHER_FLOATING_POINT) == CONTEXT_HIGHER_FLOATING_POINT) { 00613 00614 TrapFrame->StFPSR = SANITIZE_FSR(ContextFrame->StFPSR, PreviousMode); 00615 00616 if (PreviousMode == UserMode) { 00617 00618 // 00619 // Update the higher floating point save area (f32-f127) and 00620 // set the corresponding modified bit in the PSR to 1. 00621 // 00622 00623 RtlCopyIa64FloatRegisterContext( 00624 (PFLOAT128)GET_HIGH_FLOATING_POINT_REGISTER_SAVEAREA(), 00625 &ContextFrame->FltF32, 00626 96*sizeof(FLOAT128) 00627 ); 00628 00629 TrapFrame->StIPSR |= (1i64 << PSR_DFH); 00630 } 00631 00632 } 00633 00634 // 00635 // Set debug registers. 00636 // 00637 00638 if ((ContextFlags & CONTEXT_DEBUG) == CONTEXT_DEBUG) { 00639 KiSetDebugContext (TrapFrame, ContextFrame, PreviousMode); 00640 } 00641 00642 return; 00643 }

00776 : 00777 00778 This routine moves the selected contents of the specified context frame into 00779 the specified trap and exception frames according to the specified context 00780 flags. 00781 00782 Arguments: 00783 00784 TrapFrame - Supplies a pointer to a trap frame that receives the volatile 00785 context from the context record. 00786 00787 ExceptionFrame - Supplies a pointer to an exception frame that receives 00788 the nonvolatile context from the context record. 00789 00790 ContextFrame - Supplies a pointer to a context frame that contains the 00791 context that is to be copied into the trap and exception frames. 00792 00793 ContextFlags - Supplies the set of flags that specify which parts of the 00794 context frame are to be copied into the trap and exception frames. 00795 00796 PreviousMode - Supplies the processor mode for which the trap and exception 00797 frames are being built. 00798 00799 Return Value: 00800 00801 None. 00802 00803 --*/ 00804 00805 { 00806 USHORT R1Offset, R4Offset; 00807 USHORT RNatSaveIndex; 00808 SHORT BsFrameSize; 00809 SHORT TempFrameSize; 00810 00811 // 00812 // Set control information if specified. 00813 // 00814 00815 if ((ContextFlags & CONTEXT_CONTROL) == CONTEXT_CONTROL) { 00816 00817 TrapFrame->IntGp = ContextFrame->IntGp; 00818 TrapFrame->IntSp = ContextFrame->IntSp; 00819 TrapFrame->ApUNAT = ContextFrame->ApUNAT; 00820 TrapFrame->BrRp = ContextFrame->BrRp; 00821 TrapFrame->ApCCV = ContextFrame->ApCCV; 00822 TrapFrame->ApDCR = SANITIZE_DCR(ContextFrame->ApDCR, UserMode); 00823 00824 // 00825 // Set preserved applicaton registers in exception frame. 00826 // 00827 00828 ExceptionFrame->ApLC = ContextFrame->ApLC; 00829 ExceptionFrame->ApEC &= ~(PFS_EC_MASK << PFS_EC_MASK); 00830 ExceptionFrame->ApEC |= ((ContextFrame->ApEC & PFS_EC_MASK) << PFS_EC_SHIFT); 00831 00832 // 00833 // Set RSE control states in the trap frame. 00834 // 00835 00836 TrapFrame->RsPFS = ContextFrame->RsPFS; 00837 00838 BsFrameSize = (SHORT)(ContextFrame->StIFS & PFS_SIZE_MASK); 00839 RNatSaveIndex = (USHORT)((ContextFrame->RsBSP >> 3) & NAT_BITS_PER_RNAT_REG); 00840 00841 TempFrameSize = RNatSaveIndex + BsFrameSize - NAT_BITS_PER_RNAT_REG; 00842 while (TempFrameSize >= 0) { 00843 BsFrameSize++; 00844 TempFrameSize -= NAT_BITS_PER_RNAT_REG; 00845 } 00846 00847 TrapFrame->RsBSPSTORE = ContextFrame->RsBSPSTORE + BsFrameSize * 8; 00848 TrapFrame->RsBSP = TrapFrame->RsBSPSTORE; 00849 TrapFrame->RsRSC = ContextFrame->RsRSC; 00850 TrapFrame->RsRNAT = ContextFrame->RsRNAT; 00851 00852 #if DEBUG 00853 DbgPrint("KeContextToKFrames: RsRNAT = 0x%I64x\n", TrapFrame->RsRNAT); 00854 #endif // DEBUG 00855 00856 // 00857 // Set FPSR, IPSR, IIP, and IFS in the trap frame. 00858 // 00859 00860 TrapFrame->StFPSR = SANITIZE_FSR(ContextFrame->StFPSR, UserMode); 00861 TrapFrame->StIPSR = SANITIZE_PSR(ContextFrame->StIPSR, UserMode); 00862 if (((TrapFrame->StIPSR >> PSR_RI) & 3) == 3) { 00863 TrapFrame->StIPSR &= ~(3i64 << PSR_RI); 00864 } 00865 TrapFrame->StIFS = SANITIZE_IFS(ContextFrame->StIFS, UserMode); 00866 TrapFrame->StIIP = ContextFrame->StIIP; 00867 00868 // 00869 // DebugActive controls h/w debug registers. Set if new psr.db = 1 00870 // 00871 00872 KeGetCurrentThread()->DebugActive = ((TrapFrame->StIPSR & (1I64 << PSR_DB)) != 0); 00873 00874 // 00875 // Set application registers directly 00876 // 00877 00878 if (Thread == KeGetCurrentThread()) { 00879 __setReg(CV_IA64_AR21, ContextFrame->StFCR); 00880 __setReg(CV_IA64_AR24, ContextFrame->Eflag); 00881 __setReg(CV_IA64_AR25, ContextFrame->SegCSD); 00882 __setReg(CV_IA64_AR26, ContextFrame->SegSSD); 00883 __setReg(CV_IA64_AR27, ContextFrame->Cflag); 00884 __setReg(CV_IA64_AR28, ContextFrame->StFSR); 00885 __setReg(CV_IA64_AR29, ContextFrame->StFIR); 00886 __setReg(CV_IA64_AR30, ContextFrame->StFDR); 00887 } else { 00888 PKAPPLICATION_REGISTERS AppRegs; 00889 00890 AppRegs = GET_APPLICATION_REGISTER_SAVEAREA(Thread->StackBase); 00891 AppRegs->Ar21 = ContextFrame->StFCR; 00892 AppRegs->Ar24 = ContextFrame->Eflag; 00893 AppRegs->Ar25 = ContextFrame->SegCSD; 00894 AppRegs->Ar26 = ContextFrame->SegSSD; 00895 AppRegs->Ar27 = ContextFrame->Cflag; 00896 AppRegs->Ar28 = ContextFrame->StFSR; 00897 AppRegs->Ar29 = ContextFrame->StFIR; 00898 AppRegs->Ar30 = ContextFrame->StFDR; 00899 } 00900 } 00901 00902 // 00903 // Set integer registers contents if specified. 00904 // 00905 00906 if ((ContextFlags & CONTEXT_INTEGER) == CONTEXT_INTEGER) { 00907 00908 TrapFrame->IntT0 = ContextFrame->IntT0; 00909 TrapFrame->IntT1 = ContextFrame->IntT1; 00910 TrapFrame->IntT2 = ContextFrame->IntT2; 00911 TrapFrame->IntT3 = ContextFrame->IntT3; 00912 TrapFrame->IntT4 = ContextFrame->IntT4; 00913 TrapFrame->IntV0 = ContextFrame->IntV0; 00914 TrapFrame->IntTeb = ContextFrame->IntTeb; 00915 TrapFrame->Preds = ContextFrame->Preds; 00916 00917 // 00918 // t5 - t22 00919 // 00920 00921 memcpy(&TrapFrame->IntT5, &ContextFrame->IntT5, 18*sizeof(ULONGLONG)); 00922 00923 // 00924 // Set integer registers s0 - s3 in exception frame. 00925 // 00926 00927 ExceptionFrame->IntS0 = ContextFrame->IntS0; 00928 ExceptionFrame->IntS1 = ContextFrame->IntS1; 00929 ExceptionFrame->IntS2 = ContextFrame->IntS2; 00930 ExceptionFrame->IntS3 = ContextFrame->IntS3; 00931 00932 // 00933 // Set the integer nats field in the trap & exception frames 00934 // 00935 00936 R1Offset = (USHORT)((ULONG_PTR)(&TrapFrame->IntGp) >> 3) & 0x3f; 00937 R4Offset = (USHORT)((ULONG_PTR)(&ExceptionFrame->IntS0) >> 3) & 0x3f; 00938 00939 EXTRACT_NATS(TrapFrame->IntNats, ContextFrame->IntNats, 00940 1, R1Offset, 0xFFFFFF0E); 00941 EXTRACT_NATS(ExceptionFrame->IntNats, ContextFrame->IntNats, 00942 4, R4Offset, 0xF0); 00943 00944 #if DEBUG 00945 DbgPrint("KeContextToKFrames: TF->IntNats = 0x%I64x, ContestFrame->IntNats = 0x%I64x, R1OffSet = 0x%x\n", 00946 TrapFrame->IntNats, ContextFrame->IntNats, R1Offset); 00947 DbgPrint("KeContextToKFrames: EF->IntNats = 0x%I64x, R4OffSet = 0x%x\n", 00948 ExceptionFrame->IntNats, R4Offset); 00949 #endif // DEBUG 00950 00951 // 00952 // Set other branch registers in trap and exception frames 00953 // 00954 00955 TrapFrame->BrT0 = ContextFrame->BrT0; 00956 TrapFrame->BrT1 = ContextFrame->BrT1; 00957 00958 memcpy(&ExceptionFrame->BrS0, &ContextFrame->BrS0, 5*sizeof(ULONGLONG)); 00959 00960 } 00961 00962 // 00963 // Set lower floating register contents if specified. 00964 // 00965 00966 if ((ContextFlags & CONTEXT_LOWER_FLOATING_POINT) == CONTEXT_LOWER_FLOATING_POINT) { 00967 00968 TrapFrame->StFPSR = SANITIZE_FSR(ContextFrame->StFPSR, UserMode); 00969 00970 // 00971 // Set floating registers fs0 - fs19 in exception frame. 00972 // 00973 00974 RtlCopyIa64FloatRegisterContext(&ExceptionFrame->FltS0, 00975 &ContextFrame->FltS0, 00976 sizeof(FLOAT128) * (4)); 00977 00978 RtlCopyIa64FloatRegisterContext(&ExceptionFrame->FltS4, 00979 &ContextFrame->FltS4, 00980 16*sizeof(FLOAT128)); 00981 00982 // 00983 // Set floating registers ft0 - ft9 in trap frame. 00984 // 00985 00986 RtlCopyIa64FloatRegisterContext(&TrapFrame->FltT0, 00987 &ContextFrame->FltT0, 00988 sizeof(FLOAT128) * (10)); 00989 00990 } 00991 00992 // 00993 // Set higher floating register contents if specified. 00994 // 00995 00996 if ((ContextFlags & CONTEXT_HIGHER_FLOATING_POINT) == CONTEXT_HIGHER_FLOATING_POINT) { 00997 00998 TrapFrame->StFPSR = SANITIZE_FSR(ContextFrame->StFPSR, UserMode); 00999 01000 // 01001 // Update the higher floating point save area (f32-f127) and 01002 // set the corresponding modified bit in the PSR to 1. 01003 // 01004 01005 RtlCopyIa64FloatRegisterContext( 01006 (PFLOAT128)GET_HIGH_FLOATING_POINT_REGISTER_SAVEAREA(), 01007 &ContextFrame->FltF32, 01008 96*sizeof(FLOAT128) 01009 ); 01010 01011 TrapFrame->StIPSR |= (1i64 << PSR_DFH); 01012 01013 } 01014 01015 // 01016 // Set debug registers. 01017 // 01018 01019 if ((ContextFlags & CONTEXT_DEBUG) == CONTEXT_DEBUG) { 01020 KiSetDebugContext (TrapFrame, ContextFrame, UserMode); 01021 } 01022 01023 return; 01024 } }

00652 : 00653 00654 This routine flushes the user rse state from the kernel backing store to the 00655 user backing store. The user context frame is update to reflect the new 00656 context state. 00657 00658 Arguments: 00659 00660 TrapFrame - Supplies a pointer to a trap frame. 00661 00662 Return Value: 00663 00664 None. 00665 00666 --*/ 00667 00668 { 00669 SHORT BsFrameSize; 00670 SHORT RNatSaveIndex; 00671 SHORT Temp; 00672 USHORT TearPointOffset; 00673 ULONGLONG TopBound, BottomBound; 00674 ULONGLONG UserRnats1, UserRnats2; 00675 ULONGLONG Mask; 00676 00677 // 00678 // Copy user stacked registers' contents to user backing store. 00679 // N.B. Stack overflow could happen. 00680 // 00681 00682 try { 00683 00684 BsFrameSize = (SHORT)(TrapFrame->RsBSP - TrapFrame->RsBSPSTORE); 00685 00686 if (BsFrameSize) { 00687 00688 ULONGLONG Bsp, Rnat, KernelInitBsp; 00689 00690 // 00691 // Copy the dirty stacked registers back into the 00692 // user backing store 00693 // 00694 00695 RtlpFlushRSE(&Bsp, &Rnat); 00696 TearPointOffset = (USHORT) TrapFrame->RsBSPSTORE & 0x1F8; 00697 00698 KernelInitBsp= (PCR->InitialBStore | TearPointOffset) + BsFrameSize; 00699 if ((KernelInitBsp | RNAT_ALIGNMENT) != (Bsp | RNAT_ALIGNMENT)) { 00700 Rnat = *(PULONGLONG)(KernelInitBsp | RNAT_ALIGNMENT); 00701 } 00702 00703 RtlCopyMemory((PVOID)(TrapFrame->RsBSPSTORE), 00704 (PVOID)(PCR->InitialBStore + TearPointOffset), 00705 BsFrameSize); 00706 00707 TopBound = TrapFrame->RsBSP | RNAT_ALIGNMENT; 00708 BottomBound = TrapFrame->RsBSPSTORE | RNAT_ALIGNMENT; 00709 00710 RNatSaveIndex = TearPointOffset >> 3; 00711 Mask = (((1ULL << (NAT_BITS_PER_RNAT_REG - RNatSaveIndex)) - 1) << RNatSaveIndex); 00712 UserRnats1 = TrapFrame->RsRNAT & ((1ULL << RNatSaveIndex) - 1); 00713 00714 if (TopBound > BottomBound) { 00715 00716 // 00717 // user dirty stacked GR span across at least one RNAT 00718 // boundary; need to deposit the valid RNAT bits from 00719 // the trap frame into the kernel backing store. Also, 00720 // the RNAT field in the trap frame has to be updated. 00721 // 00722 00723 UserRnats2 = *(PULONGLONG)BottomBound & Mask; 00724 *(PULONGLONG)BottomBound = UserRnats1 | UserRnats2; 00725 TrapFrame->RsRNAT = Rnat; 00726 00727 #if DEBUG 00728 DbgPrint("KiFlushUserRseState 1: UserRnats1 = 0x%I64x, UserRnats2 = 0x%I64x, TF->RsRNAT = 0x%I64x\n", 00729 UserRnats1, UserRnats2, TrapFrame->RsRNAT); 00730 #endif // DEBUG 00731 00732 } else { 00733 00734 // 00735 // user stacked register region does not span across an 00736 // RNAT boundary; combine the RNAT fields from both the 00737 // trap frame and the context frame. 00738 // 00739 00740 UserRnats2 = Rnat & Mask; 00741 TrapFrame->RsRNAT = UserRnats1 | UserRnats2; 00742 00743 #if DEBUG 00744 DbgPrint("KiFlushUserRseState 2: UserRnats1 = 0x%I64x, UserRnats2 = 0x%I64x, TF->RsRNAT = 0x%I64x\n", 00745 UserRnats1, UserRnats2, TrapFrame->RsRNAT); 00746 #endif // DEBUG 00747 00748 } 00749 } 00750 00751 // 00752 // Successfully copied to user backing store; set the user's 00753 // bspstore to the value of its own bsp. 00754 // 00755 00756 TrapFrame->RsBSPSTORE = TrapFrame->RsBSP; 00757 00758 } except (EXCEPTION_EXECUTE_HANDLER) { 00759 DbgPrint("WARNING: Exception raised in krnl-to-user bstore copy\n"); 00760 } 00761 00762 return; 00763 }

00061 : 00062 00063 This routine moves the user mode h/w debug registers from the debug register 00064 save area in the kernel stack to the context record. 00065 00066 Arguments: 00067 00068 TrapFrame - Supplies a pointer to a trap frame from which volatile context 00069 should be copied into the context record. 00070 00071 ContextFrame - Supplies a pointer to the context frame that receives the 00072 context. 00073 00074 Return Value: 00075 00076 None. 00077 00078 Note: 00079 00080 PSR.db must be set to activate the debug registers. 00081 00082 This is used for getting user mode debug registers. 00083 00084 --*/ 00085 00086 { 00087 PKDEBUG_REGISTERS DebugRegistersSaveArea; 00088 00089 if (TrapFrame->PreviousMode == UserMode) { 00090 DebugRegistersSaveArea = GET_DEBUG_REGISTER_SAVEAREA(); 00091 00092 RtlCopyMemory(&ContextFrame->DbI0, 00093 (PVOID)DebugRegistersSaveArea, 00094 sizeof(KDEBUG_REGISTERS)); 00095 } 00096 }

00106 : 00107 00108 This routine moves the debug context from the specified context frame into 00109 the debug registers save area in the kernel stack. 00110 00111 Arguments: 00112 00113 TrapFrame - Supplies a pointer to a trap frame. 00114 00115 ContextFrame - Supplies a pointer to a context frame that contains the 00116 context that is to be copied. 00117 00118 PreviousMode - Supplies the processor mode for the target context. 00119 00120 Return Value: 00121 00122 None. 00123 00124 Notes: 00125 00126 PSR.db must be set to activate the debug registers. 00127 00128 This is used for setting up debug registers for user mode. 00129 00130 --*/ 00131 00132 { 00133 PKDEBUG_REGISTERS DebugRegistersSaveArea; // User mode h/w debug registers 00134 00135 if (PreviousMode == UserMode) { 00136 00137 DebugRegistersSaveArea = GET_DEBUG_REGISTER_SAVEAREA(); 00138 00139 // 00140 // Sanitize the debug control regs. Leave the addresses unchanged. 00141 // 00142 00143 DebugRegistersSaveArea->DbI0 = ContextFrame->DbI0; 00144 DebugRegistersSaveArea->DbI1 = SANITIZE_DR(ContextFrame->DbI1,UserMode); 00145 DebugRegistersSaveArea->DbI2 = ContextFrame->DbI2; 00146 DebugRegistersSaveArea->DbI3 = SANITIZE_DR(ContextFrame->DbI3,UserMode); 00147 DebugRegistersSaveArea->DbI4 = ContextFrame->DbI4; 00148 DebugRegistersSaveArea->DbI5 = SANITIZE_DR(ContextFrame->DbI5,UserMode); 00149 DebugRegistersSaveArea->DbI6 = ContextFrame->DbI6; 00150 DebugRegistersSaveArea->DbI7 = SANITIZE_DR(ContextFrame->DbI7,UserMode); 00151 00152 DebugRegistersSaveArea->DbD0 = ContextFrame->DbD0; 00153 DebugRegistersSaveArea->DbD1 = SANITIZE_DR(ContextFrame->DbD1,UserMode); 00154 DebugRegistersSaveArea->DbD2 = ContextFrame->DbD2; 00155 DebugRegistersSaveArea->DbD3 = SANITIZE_DR(ContextFrame->DbD3,UserMode); 00156 DebugRegistersSaveArea->DbD4 = ContextFrame->DbD4; 00157 DebugRegistersSaveArea->DbD5 = SANITIZE_DR(ContextFrame->DbD5,UserMode); 00158 DebugRegistersSaveArea->DbD6 = ContextFrame->DbD6; 00159 DebugRegistersSaveArea->DbD7 = SANITIZE_DR(ContextFrame->DbD7,UserMode); 00160 00161 } 00162 }


Defines
#define	ALIGN_NATS(Result, Source, Start, AddressOffset, Mask)
#define	EXTRACT_NATS(Result, Source, Start, AddressOffset, Mask)
Functions
VOID	RtlpFlushRSE (OUT PULONGLONG BackingStore, OUT PULONGLONG RNat)
VOID	KiGetDebugContext (IN PKTRAP_FRAME TrapFrame, IN OUT PCONTEXT ContextFrame)
VOID	KiSetDebugContext (IN OUT PKTRAP_FRAME TrapFrame, IN PCONTEXT ContextFrame, IN KPROCESSOR_MODE PreviousMode)
VOID	KeContextFromKframes (IN PKTRAP_FRAME TrapFrame, IN PKEXCEPTION_FRAME ExceptionFrame, IN OUT PCONTEXT ContextFrame)
VOID	KeContextToKframes (IN OUT PKTRAP_FRAME TrapFrame, IN OUT PKEXCEPTION_FRAME ExceptionFrame, IN PCONTEXT ContextFrame, IN ULONG ContextFlags, IN KPROCESSOR_MODE PreviousMode)
VOID	KiFlushUserRseState (IN PKTRAP_FRAME TrapFrame)
VOID	KeContextToKframesSpecial (IN PKTHREAD Thread, IN OUT PKTRAP_FRAME TrapFrame, IN OUT PKEXCEPTION_FRAME ExceptionFrame, IN PCONTEXT ContextFrame, IN ULONG ContextFlags)

context.c File Reference

Defines

Functions

Define Documentation

Function Documentation