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setdirty.c

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00001 /*++ 00002 00003 Copyright (c) 1989 Microsoft Corporation 00004 Copyright (c) 1993 IBM Corporation 00005 00006 Module Name: 00007 00008 setdirty.c 00009 00010 Abstract: 00011 00012 This module contains the setting dirty bit routine for memory management. 00013 00014 PowerPC specific. 00015 00016 Author: 00017 00018 Lou Perazzoli (loup) 10-Apr-1990. 00019 00020 Modified for PowerPC by Mark Mergen ([email protected]) 6-Oct-1993 00021 00022 Revision History: 00023 00024 --*/ 00025 00026 #include "mi.h" 00027 00028 VOID 00029 MiSetDirtyBit ( 00030 IN PVOID FaultingAddress, 00031 IN PMMPTE PointerPte, 00032 IN ULONG PfnHeld 00033 ) 00034 00035 /*++ 00036 00037 Routine Description: 00038 00039 This routine sets dirty in the specified PTE and the modify bit in the 00040 correpsonding PFN element. If any page file space is allocated, it 00041 is deallocated. 00042 00043 Arguments: 00044 00045 FaultingAddress - Supplies the faulting address. 00046 00047 PointerPte - Supplies a pointer to the corresponding valid PTE. 00048 00049 PfnHeld - Supplies TRUE if the PFN mutex is already held. 00050 00051 Return Value: 00052 00053 None. 00054 00055 Environment: 00056 00057 Kernel mode, APC's disabled, Working set mutex held. 00058 00059 --*/ 00060 00061 { 00062 MMPTE TempPte; 00063 ULONG PageFrameIndex; 00064 PMMPFN Pfn1; 00065 KIRQL OldIrql; 00066 00067 // 00068 // The page is NOT copy on write, update the PTE setting both the 00069 // dirty bit and the accessed bit. Note, that as this PTE is in 00070 // the TB, the TB must be flushed. 00071 // 00072 00073 PageFrameIndex = PointerPte->u.Hard.PageFrameNumber; 00074 Pfn1 = MI_PFN_ELEMENT (PageFrameIndex); 00075 00076 TempPte = *PointerPte; 00077 TempPte.u.Hard.Dirty = MM_PTE_DIRTY; 00078 MI_SET_ACCESSED_IN_PTE (&TempPte, 1); 00079 *PointerPte = TempPte; 00080 00081 // 00082 // Check state of PFN mutex and if not held, don't update PFN database. 00083 // 00084 00085 00086 if (PfnHeld) { 00087 00088 // 00089 // Set the modified field in the PFN database, also, if the phyiscal 00090 // page is currently in a paging file, free up the page file space 00091 // as the contents are now worthless. 00092 // 00093 00094 if ((Pfn1->OriginalPte.u.Soft.Prototype == 0) && 00095 (Pfn1->u3.e1.WriteInProgress == 0)) { 00096 00097 // 00098 // This page is in page file format, deallocate the page file space. 00099 // 00100 00101 MiReleasePageFileSpace (Pfn1->OriginalPte); 00102 00103 // 00104 // Change original PTE to indicate no page file space is reserved, 00105 // otherwise the space will be deallocated when the PTE is 00106 // deleted. 00107 // 00108 00109 Pfn1->OriginalPte.u.Soft.PageFileHigh = 0; 00110 } 00111 00112 Pfn1->u3.e1.Modified = 1; 00113 } 00114 00115 // 00116 // The TB entry must be flushed as the valid PTE with the dirty bit clear 00117 // has been fetched into the TB. If it isn't flushed, another fault 00118 // is generated as the dirty bit is not set in the cached TB entry. 00119 // 00120 00121 KeFillEntryTb ((PHARDWARE_PTE)PointerPte, FaultingAddress, TRUE); 00122 00123 return; 00124 } 00125 

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