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ppcserp.h

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00001 /*++ BUILD Version: 0002 // Increment this if a change has global effects 00002 00003 Copyright (c) 1991 Microsoft Corporation 00004 00005 Module Name: 00006 00007 jazzserp.h 00008 ppcserp.h 00009 00010 Abstract: 00011 00012 This header file defines the Jazz serial port registers. 00013 00014 Author: 00015 00016 David N. Cutler (davec) 28-Apr-1991 00017 Chuck Bauman 03-Jun-1993 00018 00019 00020 Revision History: 00021 00022 Modified SP_VIRTUAL_BASE and SERIAL2_PHYSICAL_BASE to use COM2 17-Aug-1993 00023 00024 --*/ 00025 //IBMJW 00026 #ifndef _PPCSERP_ 00027 #define _PPCSERP_ 00028 00029 00030 // 00031 // BUGBUG Temporarily until next drop when registry support will be included. 00032 // 00033 extern PVOID HalpEisaControlBase; 00034 #define COM1_PORT 0x3f8 00035 #define COM2_PORT 0x2f8 // IBMCDB 00036 #define SP_VIRTUAL_BASE ((PSZ) HalpEisaControlBase+COM2_PORT)// IBMCDB 00037 #define SERIAL2_PHYSICAL_BASE EISA_CONTROL_PHYSICAL_BASE+COM2_PORT // IBMCDB 00038 00039 // 00040 // Define serial port read registers structure. 00041 // 00042 00043 typedef struct _SP_READ_REGISTERS { 00044 UCHAR ReceiveBuffer; 00045 UCHAR InterruptEnable; 00046 UCHAR InterruptId; 00047 UCHAR LineControl; 00048 UCHAR ModemControl; 00049 UCHAR LineStatus; 00050 UCHAR ModemStatus; 00051 UCHAR ScratchPad; 00052 } SP_READ_REGISTERS, *PSP_READ_REGISTERS; 00053 00054 // 00055 // Define define serial port write registers structure. 00056 // 00057 00058 typedef struct _SP_WRITE_REGISTERS { 00059 UCHAR TransmitBuffer; 00060 UCHAR InterruptEnable; 00061 UCHAR FifoControl; 00062 UCHAR LineControl; 00063 UCHAR ModemControl; 00064 UCHAR Reserved1; 00065 UCHAR ModemStatus; 00066 UCHAR ScratchPad; 00067 } SP_WRITE_REGISTERS, *PSP_WRITE_REGISTERS; 00068 00069 // 00070 // Define serial port interrupt enable register structure. 00071 // 00072 00073 typedef struct _SP_INTERRUPT_ENABLE { 00074 UCHAR ReceiveEnable : 1; 00075 UCHAR TransmitEnable : 1; 00076 UCHAR LineStatusEnable : 1; 00077 UCHAR ModemStatusEnable : 1; 00078 UCHAR Reserved1 : 4; 00079 } SP_INTERRUPT_ENABLE, *PSP_INTERRUPT_ENABLE; 00080 00081 // 00082 // Define serial port interrupt id register structure. 00083 // 00084 00085 typedef struct _SP_INTERRUPT_ID { 00086 UCHAR InterruptPending : 1; 00087 UCHAR Identification : 3; 00088 UCHAR Reserved1 : 2; 00089 UCHAR FifoEnabled : 2; 00090 } SP_INTERRUPT_ID, *PSP_INTERRUPT_ID; 00091 00092 // 00093 // Define serial port fifo control register structure. 00094 // 00095 00096 typedef struct _SP_FIFO_CONTROL { 00097 UCHAR FifoEnable : 1; 00098 UCHAR ReceiveFifoReset : 1; 00099 UCHAR TransmitFifoReset : 1; 00100 UCHAR DmaModeSelect : 1; 00101 UCHAR Reserved1 : 2; 00102 UCHAR ReceiveFifoLevel : 2; 00103 } SP_FIFO_CONTROL, *PSP_FIFO_CONTROL; 00104 00105 // 00106 // Define serial port line control register structure. 00107 // 00108 00109 typedef struct _SP_LINE_CONTROL { 00110 UCHAR CharacterSize : 2; 00111 UCHAR StopBits : 1; 00112 UCHAR ParityEnable : 1; 00113 UCHAR EvenParity : 1; 00114 UCHAR StickParity : 1; 00115 UCHAR SetBreak : 1; 00116 UCHAR DivisorLatch : 1; 00117 } SP_LINE_CONTROL, *PSP_LINE_CONTROL; 00118 00119 // 00120 // Line status register character size definitions. 00121 // 00122 00123 #define FIVE_BITS 0x0 // five bits per character 00124 #define SIX_BITS 0x1 // six bits per character 00125 #define SEVEN_BITS 0x2 // seven bits per character 00126 #define EIGHT_BITS 0x3 // eight bits per character 00127 00128 // 00129 // Line speed divisor definition. 00130 // 00131 00132 #define BAUD_RATE_9600 28 // divisor for 9600 baud 00133 #define BAUD_RATE_19200 14 // divisor for 19200 baud 00134 00135 // 00136 // Define serial port modem control register structure. 00137 // 00138 00139 typedef struct _SP_MODEM_CONTROL { 00140 UCHAR DataTerminalReady : 1; 00141 UCHAR RequestToSend : 1; 00142 UCHAR Reserved1 : 1; 00143 UCHAR Interrupt : 1; 00144 UCHAR loopBack : 1; 00145 UCHAR Reserved2 : 3; 00146 } SP_MODEM_CONTROL, *PSP_MODEM_CONTROL; 00147 00148 // 00149 // Define serial port line status register structure. 00150 // 00151 00152 typedef struct _SP_LINE_STATUS { 00153 UCHAR DataReady : 1; 00154 UCHAR OverrunError : 1; 00155 UCHAR ParityError : 1; 00156 UCHAR FramingError : 1; 00157 UCHAR BreakIndicator : 1; 00158 UCHAR TransmitHoldingEmpty : 1; 00159 UCHAR TransmitEmpty : 1; 00160 UCHAR ReceiveFifoError : 1; 00161 } SP_LINE_STATUS, *PSP_LINE_STATUS; 00162 00163 // 00164 // Define serial port modem status register structure. 00165 // 00166 00167 typedef struct _SP_MODEM_STATUS { 00168 UCHAR DeltaClearToSend : 1; 00169 UCHAR DeltaDataSetReady : 1; 00170 UCHAR TrailingRingIndicator : 1; 00171 UCHAR DeltaReceiveDetect : 1; 00172 UCHAR ClearToSend : 1; 00173 UCHAR DataSetReady : 1; 00174 UCHAR RingIndicator : 1; 00175 UCHAR ReceiveDetect : 1; 00176 } SP_MODEM_STATUS, *PSP_MODEM_STATUS; 00177 00178 #endif // _JAZZSERP_ 00179 

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