test: cyrix.c File Reference

00273 { 00274 UCHAR r0, r1; 00275 ULONG id, rev; 00276 PVOID LockHandle; 00277 00278 00279 PAGED_CODE(); 00280 00281 id = Ke386CyrixId(); 00282 if (id) { 00283 00284 LockHandle = MmLockPagableCodeSection (&Ke386ConfigureCyrixProcessor); 00285 00286 id = id - 1; 00287 rev = ReadCyrixRegister(DIR1); 00288 00289 if ((id >= 0x20 && id <= 0x27) || 00290 ((id & 0xF0) == M1 && rev < 0x17)) { 00291 00292 // 00293 // These steppings have a write-back cache problem. 00294 // On these chips the L1 w/b cache can be disabled by 00295 // setting only the NW bit. 00296 // 00297 00298 _asm { 00299 cli 00300 00301 mov eax, cr0 00302 or eax, CR0_NW 00303 mov cr0, eax 00304 00305 sti 00306 } 00307 } 00308 00309 00310 switch (id) { 00311 case Cx486_SRx: 00312 case Cx486_DRx: 00313 case Cx486_SRx2: 00314 case Cx486_DRx2: 00315 00316 // 00317 // These processors have an internal cache feature 00318 // let's turn it on. 00319 // 00320 00321 r0 = ReadCyrixRegister(CCR0); 00322 r0 |= CCR0_NC1 | CCR0_FLUSH; 00323 r0 &= ~CCR0_NC0; 00324 WriteCyrixRegister(CCR0, r0); 00325 00326 // Clear Non-Cacheable Region 1 00327 WriteCyrixRegister(0xC4, 0); 00328 WriteCyrixRegister(0xC5, 0); 00329 WriteCyrixRegister(0xC6, 0); 00330 break; 00331 00332 case Cx486DX: 00333 case Cx486DX2: 00334 // 00335 // Set NO_LOCK flag on these processors according to 00336 // the number of booted processors 00337 // 00338 00339 r1 = ReadCyrixRegister(CCR1); 00340 r1 |= CCR1_NO_LOCK; 00341 if (KeNumberProcessors > 1) { 00342 r1 &= ~CCR1_NO_LOCK; 00343 } 00344 WriteCyrixRegister(CCR1, r1); 00345 break; 00346 } 00347 00348 MmUnlockPagableImageSection (LockHandle); 00349 } 00350 }

00195 : 00196 00197 Reads an internal Cyrix ID register. Note the internal register 00198 space is accessed via I/O addresses which are hooked internally 00199 to the processor. 00200 00201 The caller is responsible for only calling this function on 00202 a Cyrix processor. 00203 00204 Arguments: 00205 00206 Register - Which Cyrix register to read 00207 00208 Return Value: 00209 00210 The registers value 00211 00212 --*/ 00213 00214 { 00215 UCHAR Value; 00216 00217 _asm { 00218 mov al, Register 00219 cli 00220 out 22h, al 00221 in al, 23h 00222 sti 00223 mov Value, al 00224 } 00225 return Value; 00226 }

00236 : 00237 00238 Write an internal Cyrix ID register. Note the internal register 00239 space is accessed via I/O addresses which are hooked internally 00240 to the processor. 00241 00242 The caller is responsible for only calling this function on 00243 a Cyrix processor. 00244 00245 Arguments: 00246 00247 Register - Which Cyrix register to written 00248 Value - Value to write into the register 00249 00250 Return Value: 00251 00252 The registers value 00253 00254 --*/ 00255 00256 { 00257 _asm { 00258 mov al, Register 00259 mov cl, Value 00260 cli 00261 out 22h, al 00262 mov al, cl 00263 out 23h, al 00264 sti 00265 } 00266 }


Defines
#define	Cx486_SLC 0x0
#define	Cx486_DLC 0x1
#define	Cx486_SLC2 0x2
#define	Cx486_DLC2 0x3
#define	Cx486_SRx 0x4
#define	Cx486_DRx 0x5
#define	Cx486_SRx2 0x6
#define	Cx486_DRx2 0x7
#define	Cx486DX 0x1a
#define	Cx486DX2 0x1b
#define	M1 0x30
#define	CCR0 0xC0
#define	CCR1 0xC1
#define	CCR2 0xC2
#define	CCR3 0xC3
#define	DIR0 0xFE
#define	DIR1 0xFF
#define	CCR0_NC0 0x01
#define	CCR0_NC1 0x02
#define	CCR0_A20M 0x04
#define	CCR0_KEN 0x08
#define	CCR0_FLUSH 0x10
#define	CCR1_NO_LOCK 0x10
Functions
ULONG	Ke386CyrixId (VOID)
UCHAR	ReadCyrixRegister (IN UCHAR Register)
VOID	WriteCyrixRegister (IN UCHAR Register, IN UCHAR Value)
VOID	Ke386ConfigureCyrixProcessor (VOID)
Variables
UCHAR	CmpCyrixID []

cyrix.c File Reference

Defines

Functions

Variables

Define Documentation

Function Documentation

Variable Documentation