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debugsup.c File Reference

#include "mi.h"

Go to the source code of this file.

Functions

PVOID MmDbgReadCheck (IN PVOID VirtualAddress)
PVOID MmDbgWriteCheck (IN PVOID VirtualAddress, IN PHARDWARE_PTE Opaque)
VOID MmDbgReleaseAddress (IN PVOID VirtualAddress, IN PHARDWARE_PTE Opaque)
PVOID64 MmDbgTranslatePhysicalAddress64 (IN PHYSICAL_ADDRESS PhysicalAddress)


Function Documentation

PVOID MmDbgReadCheck IN PVOID  VirtualAddress  ) 
 

Definition at line 28 of file ia64/debugsup.c.

References MI_IS_ADDRESS_VALID_FOR_KD, MI_IS_PCR_PAGE, MmIsAddressValid(), and NULL.

00034 : 00035 00036 IA64 implementation specific: 00037 00038 This routine checks the specified virtual address and if it is 00039 valid and readable, it returns that virtual address, otherwise 00040 it returns NULL. 00041 00042 Arguments: 00043 00044 VirtualAddress - Supplies the virtual address to check. 00045 00046 Return Value: 00047 00048 Returns NULL if the address is not valid or readable, otherwise 00049 returns the virtual address. 00050 00051 Environment: 00052 00053 Kernel mode IRQL at DISPATCH_LEVEL or greater. 00054 00055 --*/ 00056 00057 { 00058 00059 if (!(MI_IS_ADDRESS_VALID_FOR_KD(VirtualAddress))) { 00060 00061 return NULL; 00062 00063 } 00064 00065 if (!MmIsAddressValid (VirtualAddress) && !MI_IS_PCR_PAGE(VirtualAddress)) { 00066 00067 return NULL; 00068 00069 } 00070 00071 return VirtualAddress; 00072 00073 }

VOID MmDbgReleaseAddress IN PVOID  VirtualAddress,
IN PHARDWARE_PTE  Opaque
 

Definition at line 174 of file ia64/debugsup.c.

References KiFlushSingleTb(), MiGetPteAddress, TRUE, and _MMPTE::u.

Referenced by KdpAddBreakpoint(), KdpMoveMemory(), KdpWriteIoSpace(), KdpWriteVirtualMemory(), and KdSetOwedBreakpoints().

00181 : 00182 00183 i386/486 implementation specific: 00184 00185 This routine resets the specified virtual address access permissions 00186 to its original state. 00187 00188 Arguments: 00189 00190 VirtualAddress - Supplies the virtual address to check. 00191 00192 Opaque - Supplies an opaque value. 00193 00194 Return Value: 00195 00196 None. 00197 00198 Environment: 00199 00200 Kernel mode IRQL at DISPATCH_LEVEL or greater. 00201 00202 --*/ 00203 00204 { 00205 MMPTE TempPte; 00206 PMMPTE PointerPte; 00207 PMMPTE InputPte; 00208 00209 InputPte = (PMMPTE)Opaque; 00210 00211 if (InputPte->u.Long != 0) { 00212 00213 PointerPte = MiGetPteAddress (VirtualAddress); 00214 00215 TempPte = *InputPte; 00216 00217 // LWFIX: Need to make the write go out to memory but can't 00218 // make it dirty here ! TempPte.u.Hard.Dirty = MM_PTE_DIRTY; 00219 00220 *PointerPte = TempPte; 00221 00222 // 00223 // BUGBUG John Vert (jvert) 3/4/1999 00224 // KeFillEntryTb is liable to IPI the other processors. This is 00225 // definitely NOT what we want as the other processors are frozen 00226 // in the debugger and we will deadlock if we try and IPI them. 00227 // Just flush the current processor instead. 00228 //KeFillEntryTb ((PHARDWARE_PTE)PointerPte, VirtualAddress, TRUE); 00229 KiFlushSingleTb(TRUE, VirtualAddress); 00230 } 00231 00232 return; 00233 }

PVOID64 MmDbgTranslatePhysicalAddress64 IN PHYSICAL_ADDRESS  PhysicalAddress  ) 
 

Definition at line 236 of file ia64/debugsup.c.

References BYTE_OFFSET, KiFlushSingleTb(), MI_PFN_ELEMENT, MiGetVirtualAddressMappedByPte, MmDebugPte, MmHighestPhysicalPage, MmIsAddressValid(), MmLowestPhysicalPage, NULL, PAGE_SHIFT, TRUE, _MMPTE::u, and ValidKernelPte.

Referenced by KdpReadPhysicalMemory(), KdpSearchPhysicalPage(), and KdpWritePhysicalMemory().

00242 : 00243 00244 IA64 implementation specific: 00245 00246 This routine maps the specified physical address and returns 00247 the virtual address which maps the physical address. 00248 00249 The next call to MmDbgTranslatePhysicalAddress removes the 00250 previous physical address translation, hence on a single 00251 physical address can be examined at a time (can't cross page 00252 boundaries). 00253 00254 Arguments: 00255 00256 PhysicalAddress - Supplies the physical address to map and translate. 00257 00258 Return Value: 00259 00260 The virtual address which corresponds to the physical address. 00261 00262 Environment: 00263 00264 Kernel mode IRQL at DISPATCH_LEVEL or greater. 00265 00266 --*/ 00267 00268 { 00269 PVOID BaseAddress; 00270 PMMPFN Pfn1; 00271 ULONG Page; 00272 00273 Page = (ULONG)(PhysicalAddress.QuadPart >> PAGE_SHIFT); 00274 00275 if ((Page > (LONGLONG)MmHighestPhysicalPage) || 00276 (Page < (LONGLONG)MmLowestPhysicalPage)) { 00277 return NULL; 00278 } 00279 00280 Pfn1 = MI_PFN_ELEMENT (Page); 00281 00282 if (!MmIsAddressValid (Pfn1)) { 00283 return NULL; 00284 } 00285 00286 BaseAddress = MiGetVirtualAddressMappedByPte (MmDebugPte); 00287 00288 KiFlushSingleTb (TRUE, BaseAddress); 00289 00290 *MmDebugPte = ValidKernelPte; 00291 MmDebugPte->u.Hard.PageFrameNumber = Page; 00292 00293 return (PVOID64)((PCHAR)BaseAddress + BYTE_OFFSET(PhysicalAddress.LowPart)); 00294 } }

PVOID MmDbgWriteCheck IN PVOID  VirtualAddress,
IN PHARDWARE_PTE  Opaque
 

Definition at line 76 of file ia64/debugsup.c.

References KiFlushSingleTb(), MI_IS_ADDRESS_VALID_FOR_KD, MI_IS_PCR_PAGE, MI_IS_PHYSICAL_ADDRESS, MiGetPteAddress, NULL, TRUE, and _MMPTE::u.

00083 : 00084 00085 IA64 implementation specific: 00086 00087 This routine checks the specified virtual address and if it is 00088 valid and writable, it returns that virtual address, otherwise 00089 it returns NULL. 00090 00091 Arguments: 00092 00093 VirtualAddress - Supplies the virtual address to check. 00094 00095 Opaque - Supplies a pointer to fill with an opaque value. 00096 00097 Return Value: 00098 00099 Returns NULL if the address is not valid or writable, otherwise 00100 returns the virtual address. 00101 00102 Environment: 00103 00104 Kernel mode IRQL at DISPATCH_LEVEL or greater. 00105 00106 --*/ 00107 00108 { 00109 PMMPTE PointerPte; 00110 MMPTE PteContents; 00111 PMMPTE InputPte; 00112 00113 InputPte = (PMMPTE)Opaque; 00114 00115 InputPte->u.Long = 0; 00116 00117 if (!(MI_IS_ADDRESS_VALID_FOR_KD(VirtualAddress))) { 00118 00119 return NULL; 00120 00121 } 00122 00123 if (MI_IS_PHYSICAL_ADDRESS(VirtualAddress)) { 00124 return VirtualAddress; 00125 } 00126 00127 PointerPte = MiGetPteAddress (VirtualAddress); 00128 00129 if (PointerPte->u.Hard.Write == 0) { 00130 00131 // 00132 // PTE is not writable, make it so. 00133 // 00134 00135 PteContents = *PointerPte; 00136 00137 *InputPte = PteContents; 00138 00139 // 00140 // Modify the PTE to ensure write permissions. 00141 // 00142 00143 PteContents.u.Hard.Write = 1; 00144 00145 *PointerPte = PteContents; 00146 00147 // 00148 // BUGBUG John Vert (jvert) 3/4/1999 00149 // KeFillEntryTb is liable to IPI the other processors. This is 00150 // definitely NOT what we want as the other processors are frozen 00151 // in the debugger and we will deadlock if we try and IPI them. 00152 // Just flush the the current processor instead. 00153 //KeFillEntryTb ((PHARDWARE_PTE)PointerPte, VirtualAddress, TRUE); 00154 KiFlushSingleTb(TRUE, VirtualAddress); 00155 00156 } 00157 00158 #if 0 00159 if (!MI_IS_PCR_PAGE(VirtualAddress)) { 00160 00161 // 00162 // PTE is not writable, return NULL. 00163 // 00164 00165 return NULL; 00166 00167 } 00168 #endif 00169 00170 return VirtualAddress; 00171 }


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